IC Knowledge - History of the Integrated Circuit

2000s

2000 - Intel Pentium 4^TM (180nm)
The Pentium 4 introduced an integer unit running at twice the processor speed. The Pentium 4 was manufactured in a silicon gate CMOS process with 0.18µm linewidths, required 21 mask layers and had 1 polysilicon layer and 6 metal layers, the Pentium 4 had 42 million transistors, a 1,400 to 1,500MHz clock speed and a 224mm² die size.

2001 - Intel Pentium 4^TM (130nm)
The 130nm Pentium 4 incorporates 55 million transitors and yet still provides a die size shrink to 146.0 mm2. At 130nm the process is a single polysilicon CMOS process with 6 copper layers and requires an estimated 26 mask.

2002 - 1Gb DRAM enters volume production
Utilizing a 26 mask, 6 polysilicon layer (stacked DRAMs) 130nm process volume, 1Gb DRAMs had a 203.6 mm2 die size and an average selling price for 2002 of $50.

2003 - Intel Pentium 4^TM (90nm)
Intel introduced a 90nm process in 2003. The single polysilicon CMOS process has 7 layers of coper metal and requires an estimated 29 mask layers. The 90nm Pentium 4 has 125 million transitors and the die size shrinks to 112 mm2. The most notable part of the 90nm process is the introduction of strained silicon by using embedded silicon germanium and tensile stress layers.

2005 - Intel Pentium 4^TM (65nm)
Intel introduced a 65nm process in 2005. The single polysilicon CMOS process has 8 layers of coper metal and requires an estimated 31 mask layers. The 65nm Pentium 4 has 169 million transitors and the die sizeis 189.9 mm2. Intel soon swithced to the new smaller "Core" design.

2007 - Intel Core 2 Duo (45nm)
Intel's 45nm debuted in 2007 as the first high-k gate oxide with dual metal gates in production. The 45nm process is a single polysiliocn process with 9 copper layers and requires and estimated 36 mask layers. The 45nm Core 2 Duo die size is 105.78mm2 and packs in 410 million transitors.