IC Knowledge - History of the Integrated Circuit

1960s

1960 - Epitaxial deposition developed [7]
Bell Labs developed the technique of Epitaxial Deposition whereby a single crystal layer of material is deposited on a crystalline substrate. Epitaxial deposition is widely used in bipolar and sub-micron CMOS fabrication.
1960 - First MOSFET fabricated [5],[7]
Kahng at Bell Labs fabricates the first MOSFET.

1960 - 0.525 inch silicon wafers introduced [24]
1961 - First commercial ICs [13]
Fairchild and Texas Instruments both introduce commercial ICs.
1962 - Transistor-Transistor Logic invented [5]
1962 - Semiconductor industry surpasses $1-billion in sales [14]
1963 - First MOS IC [13]
RCA produces the first PMOS IC.
1963 - CMOS invented [15]
Frank Wanlass at Fairchild Semiconductor originated and published the idea of complementary-MOS (CMOS). It occurred to Wanlass that a complementary circuit of NMOS and PMOS would draw very little current. Initially Wanlass tried to make a monolithic solution, but eventually he was forced to prove the concept with discrete devices. Enhancement mode NMOS transistors were not yet available and so Wanlass was used a depletion mode device biased to the off-state. Amazingly CMOS shrank standby power by six orders of magnitude over equivalent bipolar or PMOS logic gates. On June 18, 1963 Wanlass applied for a patent. On December 5th 1967 Wanlass was issued U.S. Patent # 3,356,858 for "Low Stand-By Power Complementary Field Effect Circuitry". CMOS forms the basis of the vast majority of all high density ICs manufactured today.
1964 - First commercial contact printer
Contact printing was the work-horse technology for exposing patterns onto IC wafers into the 1970s.
1964 - 1 inch silicon wafers introduced [24]
1965 - Moore's law [16]
In 1965 Gordon Moore, director of research and development at Fairchild Semiconductor wrote a paper for Electronics entitled "Cramming more components onto integrated circuits". In the paper Moore observed that "The complexity for minimum component cost has increased at a rate of roughly a factor of two per year". This observation became known as Moore's law, the number of components per IC double every year. Moore's law was later amended to, the number of components per IC doubles every 18 months. Moore's law hold to this day.
1965 - 100-bit shift register [8]
100-bit shift register with 600 transistors - GME, 21-bit static shift register with 160 transistors - GI, binary-to-digital decoder with 150 transistors - TI.
1966 - Self Aligned Gate MOSFET
Bower and Dill disclose the self aligned gate MOSFET (SAGFET) in a paper entitled
"Insulated Gate Field Effect Transistors Fabricated Using the Gate as Source-Drain Mask" [25], presented at the 1966 IEDM. The self aligned transitor was first concieved by Bower in 1965 [26]. The slef aligned transistor is the building block of all modern MOSFET technologies.
1966 - 16-bit bipolar memory [1]
IBM introduced a 16-bit bipolar memory chip in a System/360 Model 95 they developed for NASA.
1966 - First bipolar logic [5]
Motorola Emitter-Coupled-Logic (ECL) 3 input gate.
1966 - Single transistor DRAM cell invented [1]
Dr. Robert Dennard at IBM attended a talk on work in thin film magnetic memory. The magnetic memory team used "a piece of magnetic material and a couple of lines passing near it' to store a bit of information. Several months later Dennard developed the idea that a bit could be stored by charging or discharging a capacitor and a single FET could be used to control the process. The single transistor DRAM cell. Virtually all modern DRAMs are based on the 1 transistor cell.
1966 - 1.5 inch silicon wafers introduced [24]
1967 - Floating gate disclosed
Kahng and Sze of Bell labs disclosed the use of floating gate devices for memory applications in the Bell System Technical Journal. Floating gates a very common technique used to make EEPROMs.
1967 - MNOS disclosed
Wegener, Lincoln, Pao, O'Connell and Oleksiak disclosed the NMOS transistor and it's use in memory. Floating gates are a technique used to make EEPROMs.
1968 - 64-bit bipolar array chip [1]
IBM introduced a 64-bit bipolar array chip as a high speed memory buffer in the System/360 Model 85. The chip contained 64 storage cells and 664 components.
1969 - BiCMOS invented [I]
Lin, Ho, Iyer and Kwong disclose a "Complementary MOS-Bipolar Transistor Structure" at IEDM.