IC Knowledge - Glossary

Glossary of Integrated Circuit Terminology - S

Salacide - Self Aligned Silicide - a silicide process where an oxide or nitride layer with opening down to silicon is used to allow silicide to only form in selected areas.
SC1 - Standard Clean 1, the first cleaning step in the original RCA clean. SC1 is a heated ammonium hydroxide, NH₄OH, hydrogen peroxide H₂O₂, bath used to remove organic residues and particles. Frequently performed in a Megasonic bath to improve particle removal.
SC2 - Standard Clean 2, the second cleaning step in the original RCA clean. SC2 is a heated hydrochloric acid, HCl, hydrogen peroxide, H₂O₂, bath primarily used to remove metal contaminants.
Scaling - a mathematical set of relationships determining how to shrink an MOS transistor to improve performance while controlling electric fields preventing hot carrier effects.
Scanning Electron Microscope (SEM) - a microscope that uses a finely focused electron beam scanned across a sample to produce high resolution images. A SEM can resolve much smaller feature than a standard microscope, down to approximately 2 nanometers.
Scanning Projection Aligner - an aligner that scans light through a slit across a mask to produce an image on a wafer. By scanning through a slit, an exposure area may be scanned by using a relatively small lens. The technique allows larger areas to be imaged without requiring huge optical systems, making optical system design easier.
Schottky Diode - a diode formed by contact between a metal and a semiconductor.
Scribe Line - an area between die left empty of circuitry where a saw can pass when sawing die apart. Also referred to as a street.
SDRAM - Synchronous Dynamic Random Access Memory - a newer type of DRAM where data access is synchronized to a clock. Higher speed than standard and EDO DRAM.
Seeds Model - a mathematical probability model for converting defect density to predicted yield.
Selective Etching - the removal by etching of one material without etching another material.
Selectivity - the difference in removal rate between two material during an etching or CMP process.
SEM - see Scanning Electron Microscope.
SEMATECH - an industry consortium dedicated to improving semiconductor manufacturing methods.
Semiconductor - an element with an electrical resistivity in the range between an insulator and a conductor. A material that can conduct or block the flow of electric current depending on processing and applied electrical biases.
Semi-custom - an integrated circuit that has been designed either by using existing blocks of design elements or is made on an existing array of gates which are just connected together to form a new circuit. See also Standard Cell and Gate Array.
Sheet Resistance - the resistance of a film, material or layer measured by a four point probe. The resistance represents the parallel resistance of an infinite number of infinitely thin parallel sheets. Sheet resistance is expressed as ohms per square area and is equal to the average resistivity of a layer multiplied by the junction depth or thickness of the layer.
Si - the symbol for silicon
Si Gate - see Silicon Gate
Silane - chemical formula SiH₄, silane is a pyrophoric, toxic gas with a TLV of 5ppm, and is combustible in the range of ~1-96%. Silane is widely used to deposit silicon containing films in a variety of CVD reactions.
Silicide - a compound of metal and silicon. Silicides may be easily formed by thermally reacting a variety of metal with silicon and are widely used as contacts to silicon and conductors.
Silicon - atomic symbol, Si, silicon is the 14th element in the periodic table (atomic number 14) with an atomic weight of 28.09. Silicon is a group IV element and is a semiconductor at room temperature with an energy gap of 1.11eV. Silicon is far and away the most widely used semiconductor material.
Silicon Dioxide - chemical formula SiO₂, silicon dioxide is an excellent insulator with a dielectric constant of 3.9, a breakdown strength of 107 V/cm, and is thermodynamically stable on silicon up to the silicon melting temperature.
Silicon Gate - a type of MOS device that uses doped polysilicon as the gate electrode.
Silicon Nitride - chemical formula Si₃N₄, silicon nitride is a good insulator with a dielectric constant of 7.5, a breakdown strength of 107 V/cm, and is an excellent barrier against moisture and other contaminants. Silicon nitride is highly stressed in direct contact with silicon and so an intervening stress relief layer is typically used.
Silicon On Insulator (SOI) - a substrate that has a layer of single crystal silicon on top of an insulating layer, on top of additional silicon. SOI is used to reduce stray capacitance for high-speed and or low-power CMOS and may also be used for high voltage applications.
Silicon Tetrachloride - chemical formula SiCl₄silicon tetrachloride is a corrosive, with a pungent, suffocating odor. Silicon tetrachloride is used for CVD deposition of silicon nitride and epitaxial silicon films.
Silicon Tetrafluoride - chemical formula SiF₄, silicon tetrafluoride has a suffocating odor.
Single Crystal - a material where the atoms form a periodic array.
SIP - Single In-Line Package - a package with a single row of pins along one edge, usually mounted up on edge.
Slice - another term for wafer, most often used during wafer manufacture where wafers are sliced from an ingot.
SO - Small Outline - a family of package types including SOP, SOJ and TSOP. The most common type of IC packages used for 58% of IC on a unit basis. SO packages are small surface mount packages.
Sodium Hydroxide - chemical formula NaOH, sodium hydroxide was at one time used to develop positive photoresist but has fallen out of favor due to sodium contamination concerns. Sodium hydroxide is a strong base and is commonly sold as a 50% solution and has a density of 1.53Kg/L. Sodium hydroxide will burn skin or eyes.
Soft Bake - a bake performed after photoresist coating but prior to exposure. Soft bake dries the photoresist film and improves photoresist adhesion to the wafer.
SOI - see Silicon On Insulator.
SOJ - Small Outline J Lead Package - a type of SO package with a lead that is bent under the package in what is referred to as a J lead configuration.
SOP - Small Outline Package - another type of SO package with leads that flare out at the bottom.
Source/drains - the source in a MOSFET injects carriers into the channel region and the drain collects the carriers.
Spatial Coherence - the Phase relationship between Photons or Wave Fronts. Point sources of Light produce Wave Fronts that spread out from a single point and are perfectly Spatially Coherent, large area Light Sources produce Spatially incoherent Light.
Special Cause Variation - a variation in output for a process because something about the process changed, such as, wear-out a setting was changed, something broke in the process equipment, parts were changed, etc. Special cause variation can be desirable or undesirable, for example, if a part on a machine is fixed and the variability in machine output is suddenly decreased, that would be a desirable special cause, alternately, if a part on a machine breaks increasing variability that would be undesirable.
Spin Coater - see Coater.
Spreading Resistance Probe (SRP) - a metrology technique for measuring electrically active dopant levels. A semiconductor is ground down at an angle through the area to be measured and four tiny needles are dragged along the bevel measuring resistance as they go. By knowing the angle and the speed of travel for the needles the resistance versus depth may be measured. SRP requires an area approximately 0.1mms wide to measure.
Sputtering - a process used to deposit materials where a plasma is used to generate ions, the ions are attracted to a target, the ions impact the target and physically knock loose target atoms, and the atoms knocked loose condense out on wafers placed in the chamber depositing a film. Sputtering is primarily used to deposit metal films. Sputtering is preferred over evaporation because sputtering will transfer a metal alloy from a target to a wafer with roughly the same composition on the wafer as in the target. Evaporation deposits elements at different rates depending on vapor pressure so the film on the wafer may not match the composition of the target. See also, tech brief on Sputtering.
SRAM - Static Random Access Memory - a type of semiconductor memory where data may be accessed randomly and data is maintained as long as power is applied, SRAMs do not require refresh like DRAM's. SRAM's typically have faster memory access than DRAMs.
SRP - see Spreading Resistance Probe
SSI - Small Scale Integration - ICs with fewer than 30 transistors.
Standard Cell - an integrated circuit design where circuit blocks from previous designs are combined to create a new design.
Standing Wave - two superimposed waves of the same frequency traveling in opposite directions.
Starting Wafer - a wafer prior to the fabrication process. Most companies starting wafers or starting wafers with an epitaxial layer on them from third parties.
Steam Oxidation - oxidation using steam.
Step and Repeat - a system that exposes a wafer by exposing an area of the wafer and then stepping to the next adjacent area of the wafer to perform the next exposure. The system steps and exposes repeatedly until the whole wafer is covered with patterns. Step and Repeat system utilize reticle to create patterns. Virtually all sub-micron semiconductor exposure is done by some type of stepping exposure system. See also step and scan.
Step and Scan - a step and scan system steps to different locations on a wafer for exposure similar to a step and repeat system, except a step and repeat system exposes a whole area at once and a step and scan system scans light through a slit across the area to be exposed. Difficulties in manufacturing large lens with high resolution limit step and repeat lens systems to approximately 25 x 25mm exposure areas, referred to as fields. Step and scan can produce an approximately 25mm wide field but then scan to a length of approximately 35mms.
Step Coverage - the ratio of the thickness of a film over a step edge to the thickness in a flat area. Most metalization processes result in a thinner metal layer over a step than in a flat area. Most people require or at least target >50% step coverage.
Stepper - see Step and Repeat
Street - see Scribe Line.
Stripping - the process of removing photoresist. Stripping may be accomplished by acid or solvent based wet strippers or by dry ashing.
Structured ASIC - an IC with predefined blocks that is programmed by customizing the top two to five routing layers. Structured ASICs do not require all layers to be changed the way full custom or cell based ASICs do. Structured ASIC are sometime used to implement designs that are prototyped in FPGAs. The structured ASIC typically saves area and power relative to the FPGA design.
Sub Atmospheric CVD (SACVD) - CVD performed at a pressure below atmospheric pressure.
Sub Micron - dimensions smaller than one micron.
Substrate - another term for a wafer.
Sulfur Hexafluoride - chemical formula SF₆, sulfur hexafluoride has a TLV of 1,000ppm and is used as an etch gas.
Sulfuric Acid - chemical formula H₂SO₄, sulfuric acid is primarily used to strip photoresist as part of a sulfuric acid - hydrogen peroxide mixture. Sulfuric acid will strip photoresist on it's own but carbon, C, build up in the bath. The addition of hydrogen peroxide, H₂O₂, volatizes the carbon from the bath as carbon dioxide, CO₂, and carbon monoxide, CO. Sulfuric acid is commonly sold as a 98% solution and has a density of 1.84Kg/L. Sulfuric acid burns on contact with skin or eyes and the vapors will irritate or burn eyes or lungs.
Surface Tension - the force that acts on the surfaces of liquids causing them to "bead up" minimizing contact with solid surfaces.
Surfactant - soap like chemicals added to solutions to reduce surface tension and improve wetting.
Susceptor - a plate on which wafer may be heated during deposition steps.